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[IEEE 2012 International Conference on Computers and Devices for Communication (CODEC) - Kolkata, India (2012.12.17-2012.12.19)] 2012 5th International Conference on Computers and Devices for Communication (CODEC) - Within-clock power gating architecture implimentation to reduce leakage

Pradhan, Sambhu Nath, Nath, Debanjali, Choudhury, Priyanka, Nag, Abhishek

Année:

2012

Langue:

english

Fichier:

PDF, 253 KB

english, 2012

Leakage Reduction of SRAM-Based Look-Up Table Using Dynamic Power Gating

Nag, Abhishek, Nath, Debanjali, Pradhan, Sambhu Nath

Journal:

Journal of Circuits System and Computers

Année:

2016

Langue:

english

Fichier:

PDF, 227 KB

english, 2016

Low power finite state machine synthesis using power-gating

Sambhu Nath Pradhan, M. Tilak Kumar, Santanu Chattopadhyay

Journal:

Integration, the VLSI Journal

Année:

2011

Langue:

english

Fichier:

PDF, 379 KB

english, 2011

A new design of adder circuit for low power and high speed in sub-threshold region

Chakraborty, Angshuman, Pradhan, Sambhu Nath

Journal:

International Journal of Electronics Letters

Année:

2014

Langue:

english

Fichier:

PDF, 873 KB

english, 2014

Hybrid Approach of Within-Clock Power Gating and Normal Power Gating to Reduce Power

Nath, Debanjali, Choudhury, Priyanka, Pradhan, Sambhu Nath

Journal:

Journal of Circuits System and Computers

Année:

2016

Langue:

english

Fichier:

PDF, 299 KB

english, 2016

Clock Jitter Reduction and Flat Frequency Generation in PLL Using Autogenerated Control Feedback

Bhowmik, Suman, Pradhan, Sambhu Nath, Bhattacharyya, Bidyut K.

Journal:

IEEE Transactions on Components Packaging and Manufacturing Technology

Année:

2017

Langue:

english

Fichier:

PDF, 1.87 MB

english, 2017

Low Power FSM Synthesis Based on Automated Power and Clock Gating Technique

Nag, Abhishek, Das, Subhajit, Pradhan, Sambhu Nath

Journal:

Journal of Circuits System and Computers

Année:

2018

Langue:

english

Fichier:

PDF, 914 KB

english, 2018

[IEEE 2008 IEEE Computer Society Annual Symposium on VLSI - Montpellier, France (2008.04.7-2008.04.9)] 2008 IEEE Computer Society Annual Symposium on VLSI - Integrated Power-Gating and State Assignment for Low Power FSM Synthesis

Pradhan, Sambhu Nath, Kumar, M. Tilak, Chattopadhyay, Santanu

Année:

2008

Langue:

english

Fichier:

PDF, 295 KB

english, 2008

[IEEE 2012 7th International Conference on Electrical & Computer Engineering (ICECE) - Dhaka, Bangladesh (2012.12.20-2012.12.22)] 2012 7th International Conference on Electrical and Computer Engineering - An elitist area-power density trade-off in VLSI floorplan using genetic algorithm

Das, Apangshu, Choudhury, Somnath Roy, Kumar, Balla Kiran, Pradhan, Sambhu Nath

Année:

2012

Langue:

english

Fichier:

PDF, 544 KB

english, 2012

[IEEE 2012 1st International Conference on Recent Advances in Information Technology (RAIT) - Dhanbad, India (2012.03.15-2012.03.17)] 2012 1st International Conference on Recent Advances in Information Technology (RAIT) - A technique for power reduction of CMOS circuit at 65nm technology

Chakraborty, Angshuman, Pradhan, Sambhu Nath

Année:

2012

Langue:

english

Fichier:

PDF, 180 KB

english, 2012

[IEEE 2008 IEEE Region 10 and the Third international Conference on Industrial and Information Systems (ICIIS) - Kharagpur, India (2008.12.8-2008.12.10)] 2008 IEEE Region 10 and the Third international Conference on Industrial and Information Systems - AND-XOR Network Synthesis with Area-Power Trade-off

Pradhan, Sambhu Nath, Chattopadhyay, Santanu

Année:

2008

Langue:

english

Fichier:

PDF, 261 KB

english, 2008

[IEEE 2012 International Conference on Computers and Devices for Communication (CODEC) - Kolkata, India (2012.12.17-2012.12.19)] 2012 5th International Conference on Computers and Devices for Communication (CODEC) - Two new techniques to reduce gate leakage at 65 nm technology

Chakraborty, Angshuman, Pradhan, Sambhu Nath

Année:

2012

Langue:

english

Fichier:

PDF, 409 KB

english, 2012

[IEEE TENCON 2008 - 2008 IEEE Region 10 Conference (TENCON) - Hyderabad, India (2008.11.19-2008.11.21)] TENCON 2008 - 2008 IEEE Region 10 Conference - Power-gated FSM synthesis integrating partitioning and state assignment

Kumar, M. Tilak, Pradhan, Sambhu Nath, Chattopadhyay, Santanu

Année:

2008

Langue:

english

Fichier:

PDF, 204 KB

english, 2008

CG-in-PG architecture implementation for power reduction in FSMs

Choudhury, Priyanka, Nag, Abhishek, Nath, Debanjali, Pradhan, Sambhu Nath

Journal:

International Journal of Electronics Letters

Année:

2014

Langue:

english

Fichier:

PDF, 228 KB

english, 2014

MULTIPLEXER-BASED MULTI-LEVEL CIRCUIT SYNTHESIS WITH AREA-POWER TRADE-OFF

PRADHAN, SAMBHU NATH, CHATTOPADHYAY, SANTANU

Journal:

Journal of Circuits System and Computers

Année:

2012

Langue:

english

Fichier:

PDF, 270 KB

english, 2012

AND-OR-XOR NETWORK SYNTHESIS WITH AREA-POWER TRADE-OFF

PRADHAN, SAMBHU NATH, KUMAR, M. TILAK, CHATTOPDHYAY, SANTANU

Journal:

Journal of Circuits System and Computers

Année:

2011

Langue:

english

Fichier:

PDF, 157 KB

english, 2011

Design of new high-speed and low-energy dynamic PLA

Pradhan, Sambhu Nath, Bhowmik, Suman, Choudhury, Priyanka, Nath, Debanjali, Nag, Abhishek, Deb, Debajit, Paul, Bikram

Journal:

International Journal of Electronics Letters

Année:

2014

Langue:

english

Fichier:

PDF, 343 KB

english, 2014

[IEEE APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) - Macao, China (2008.11.30-2008.12.3)] APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems - Three-level AND-OR-XOR network synthesis: A GA based approach

Pradhan, Sambhu Nath, Kumar, M. Tilak, Chattopadhyay, Santanu

Année:

2008

Langue:

english

Fichier:

PDF, 447 KB

english, 2008

[IEEE 2015 2nd International Conference on Electronics and Communication Systems (ICECS) - Coimbatore, India (2015.2.26-2015.2.27)] 2015 2nd International Conference on Electronics and Communication Systems (ICECS) - Implementation of circuit in different adiabatic logic

Chaudhuri, Arpan, Saha, Mamia, Bhowmik, Moumita, Pradhan, Sambhu Nath, Das, Subhrajit

Année:

2015

Langue:

english

Fichier:

PDF, 444 KB

english, 2015

[IEEE 2015 International Conference on Computing, Communication & Automation (ICCCA) - Greater Noida, India (2015.5.15-2015.5.16)] International Conference on Computing, Communication & Automation - A genetic algorithm approach for hybrid ALU design

Purkayastha, Arnab Ardhendu, Choudhury, Somnath Roy, Pradhan, Sambhu Nath

Année:

2015

Langue:

english

Fichier:

PDF, 493 KB

english, 2015

[IEEE 2015 International Conference on Electronic Design, Computer Networks & Automated Verification (EDCAV) - Shillong, India (2015.1.29-2015.1.30)] 2015 International Conference on Electronic Design, Computer Networks & Automated Verification (EDCAV) - Thermal aware output polarity selection of programmable logic arrays

Das, Apangshu, Pradhan, Sambhu Nath

Année:

2015

Langue:

english

Fichier:

PDF, 423 KB

english, 2015

An Autonomous Clock Gating Technique in Finite State Machines Based on Registers Partitioning

Nag, Abhishek, Pradhan, Sambhu Nath

Journal:

Journal of Circuits System and Computers

Année:

2016

Langue:

english

Fichier:

PDF, 341 KB

english, 2016

[IEEE 2015 International Conference and Workshop on Computing and Communication (IEMCON) - Vancouver, BC, Canada (2015.10.15-2015.10.17)] 2015 International Conference and Workshop on Computing and Communication (IEMCON) - Low power and high testable Finite State Machine synthesis

Pradhan, Sambhu Nath, Choudhury, Priyanka

Année:

2015

Langue:

english

Fichier:

PDF, 273 KB

english, 2015

Layout-oriented look up table-based dual threshold approach to reduce leakage

Pradhan, Sambhu Nath, Chakraborty, Angshuman, Nag, Abhishek, Nath, Debanjali

Journal:

International Journal of Computer Aided Engineering and Technology

Année:

2015

Langue:

english

Fichier:

PDF, 2.66 MB

english, 2015

Thermal Aware SOC Testing by Introducing Cooling Period

Sarkar, Trupa, Chakraborty, Shrabanti, Paul, Bikram, Pradhan, Sambhu Nath

Journal:

IETE Technical Review

Année:

2016

Langue:

english

Fichier:

PDF, 734 KB

english, 2016

Reduction of Noise Using Continuously Changing Variable Clock and Clock Gating for IC Chips

Bhowmik, Suman, Deb, Debajit, Pradhan, Sambhu Nath, Bhattacharyya, Bidyut K.

Journal:

IEEE Transactions on Components Packaging and Manufacturing Technology

Année:

2016

Langue:

english

Fichier:

PDF, 3.06 MB

english, 2016

Power gating architecture implementation inside clock period to reduce power

Nath, Debanjali, Choudhury, Priyanka, Nag, Abhishek, Pradhan, Sambhu Nath

Journal:

International Journal of Computer Aided Engineering and Technology

Année:

2014

Langue:

english

Fichier:

PDF, 229 KB

english, 2014

Power-area trade-off in power gated FSM synthesis

Choudhury, Priyanka, Pradhan, Sambhu Nath

Journal:

International Journal of Circuits and Architecture Design

Année:

2016

Langue:

english

Fichier:

PDF, 321 KB

english, 2016

Gate level leakage minimisation at 90 nm technology

Chakraborty, Angshuman, Pradhan, Sambhu Nath

Journal:

International Journal of Computer Aided Engineering and Technology

Année:

2013

Langue:

english

Fichier:

PDF, 343 KB

english, 2013

[IEEE 2016 International Conference on Microelectronics, Computing and Communications (MicroCom) - Durgapur, India (2016.1.23-2016.1.25)] 2016 International Conference on Microelectronics, Computing and Communications (MicroCom) - Design of high speed and low power full adder in sub-threshold region

Pradhan, Sambhu Nath, Rai, Vivek, Chakraborty, Angshuman

Année:

2016

Langue:

english

Fichier:

PDF, 574 KB

english, 2016

Power Supply Noise Reduction of Multicore CPU by Staggering Current and Variable Clock Frequency

Bhowmik, Suman, Pradhan, Sambhu Nath, Bhattacharyya, Bidyut K.

Journal:

IEEE Transactions on Components Packaging and Manufacturing Technology

Année:

2018

Langue:

english

Fichier:

PDF, 3.45 MB

english, 2018

[IEEE 2017 Devices for Integrated Circuit (DevIC) - Kalyani, India (2017.3.23-2017.3.24)] 2017 Devices for Integrated Circuit (DevIC) - Area, power and temperature optimization during binary decision diagram based circuit synthesis

Das, Apangshu, Debnath, Akash, Pradhan, Sambhu Nath

Année:

2017

Langue:

english

Fichier:

PDF, 1008 KB

english, 2017

Shared Reed-Muller Decision Diagram Based Thermal-Aware AND-XOR Decomposition of Logic Circuits

Das, Apangshu, Pradhan, Sambhu Nath

Journal:

VLSI Design

Année:

2016

Langue:

english

Fichier:

PDF, 2.00 MB

english, 2016

Thermal-Aware Partitioning and Encoding of Power-Gated FSM

Choudhury, Priyanka, Manna, Kanchan, Rai, Vivek, Pradhan, Sambhu Nath

Journal:

Journal of Circuits System and Computers

Année:

2018

Langue:

english

Fichier:

PDF, 188 KB

english, 2018

Facial Image Analysis for Expression Recognition by Bidimensional Empirical Mode Decomposition

Saha, Ashim, Pukhrambam, Mameeta, Nath Pradhan, Sambhu

Journal:

Indian Journal of Science and Technology

Année:

2016

Langue:

english

Fichier:

PDF, 659 KB

english, 2016

Reduced ordered binary decision diagram-based combinational circuit synthesis for optimising area, power and temperature

Das, Apangshu, Debnath, Akash, Pradhan, Sambhu Nath

Journal:

International Journal of Nanoparticles

Année:

2019

Fichier:

PDF, 403 KB

2019

NSGA-II based Thermal-Aware Mixed Dual Reed-Muller Network Synthesis Using Parallel Tabular Technique

Das, Apangshu, Hareesh, Yallapragada C., Pradhan, Sambhu Nath

Journal:

Journal of Circuits System and Computers

Année:

2020

Langue:

english

Fichier:

PDF, 641 KB

english, 2020

Facial expression recognition based on eigenspaces and principle component analysis

Saha, Ashim, Pradhan, Sambhu Nath

Journal:

International Journal of Computational Vision and Robotics

Année:

2018

Fichier:

PDF, 906 KB

2018

[IEEE 2020 International Conference on Computational Performance Evaluation (ComPE) - Shillong, India (2020.7.2-2020.7.4)] 2020 International Conference on Computational Performance Evaluation (ComPE) - Study on Correlation among the Pollutant Gases and Strategy to Increase the Battery Lifetime of Sensor Network Based Monitoring System

Purkayastha, Koel Datta, Patra, Shashank Sekhar, Pradhan, Sambhu Nath

Année:

2020

Fichier:

PDF, 593 KB

2020

[IEEE 2020 International Conference on Computational Performance Evaluation (ComPE) - Shillong, India (2020.7.2-2020.7.4)] 2020 International Conference on Computational Performance Evaluation (ComPE) - Impact of Transistor Aging on the Reliability of the Analog Circuit

Bhattacharjee, Abhishek, Pradhan, Sambhu Nath

Année:

2020

Fichier:

PDF, 643 KB

2020

FPGA and ASIC realisation of EMD algorithm for real-time signal processing

Das, Kaushik, Nath, Debanjali, Pradhan, Sambhu Nath

Journal:

IET Circuits Devices & Systems

Année:

2020

Fichier:

PDF, 2.30 MB

2020

Transistor level realisation of power gated FSM

Pradhan, Sambhu Nath, Choudhury, Priyanka, Nath, Debanjali

Journal:

International Journal of Computer Aided Engineering and Technology

Année:

2017

Fichier:

PDF, 1.59 MB

2017

An Improved Matrix Generation Framework for Thermal Aware Placement in VLSI

Choudhury, Somnath Roy, Pradhan, Sambhu Nath

Journal:

IEEE Access

Année:

2020

Fichier:

PDF, 6.12 MB

2020